SoC Design and Verification Engineering Co-op
The SoC Development team is looking for a college co-op student for January 2020 through August 2020 to join a team of experienced engineers working on design and verification of hard disk drive and solid state drive controller SoCs.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
· Develop, test and support UVM testbenches for SoC level verification
· Testplan documentation and code reviews
· Verify various features using targeted/random/corner-case/coverage tests
· Simulate and debug RTL and digital circuits using tools such as Cadence Incisive, Cadence Xcelium, Cadence vManager, Mentor Graphic QuestaSim, and/or Synopsys VCS
· Regression management and code/functional coverage analysis
· Develop, test and support scripts for simulation, regression management, synthesis/timing, documentation and other tools
QUALIFICATIONS:
· College student majoring in Computer Engineering, Electrical Engineering, Computer Science, or related field.
· Minimum of 3.0 GPA
· Exceptional written and verbal communication skills
· Strong technical skills in area of study
· Interest in ASICs, SoCs, hard disk drives, flash, semiconductor components
· Proficient in Microsoft Office applications
· Strong team-player who can collaborate with colleagues
DESIRED SKILLS AND KNOWLEDGE:
· Verification methodology - UVM
· System Verilog, Verilog
· Object Oriented Programming
· Linux operating system
· Perl, Python, MySQL, PHP
· High Speed Serial Interface Protocols – SAS, SATA, PCIe, UFS
· SDRAM Interface Protocols – DDR3, DDR4
· ARM AMBA – APB, AHB, AXI