Post Silicon Validation Engineer
Role 9: Post Silicon Validation Engineer
Location: Santa Clara, CA
Key skills:
- Experience or strong technical knowledge about debugging signal integrity issues.
- Experience or strong technical knowledge about communication protocols like SPI, I2C, QSPI, UART, SD/EMMC. USB and PCIe are a plus.
- Hands-on experience with hardware setup, BIOS/ OS setup and debug.
- Hands-on experience with lab equipment like oscilloscopes, BERT, protocol analyzers.
- Comfortable with both Linux and Windows.
Scope of Work:
- Power & Perf measurements under various use case scenarios, associated debugs, and analysis
- DDR interfaces bring up and qualification activities
- PVT qualification & debug of systems (small and large sample size) intended for testing HW-SW co-working stability
- Electrical measurements of different IO interfaces, first level analysis & debugs
- Functional validation of IO interfaces
Required Qualifications:
- BE/BTech with 1 to 3 years of experience
- Clarity on Digital design & Signal integrity basics
- Knowledge on schematics and PCB file usage, voltage regulator design concepts
- Familiarity with PC architecture, present day interfaces and & interactions of Software (BIOS, Driver & OS) with hardware
- Familiarity of working in lab environment and usage of equipment like DSO, Multimeter, Power supplies. Must know lab equipment specifications and considerations behind them.
- Familiarity with scripting languages like Perl/Python
- Proficiency in windows & Linux operating systems and Microsoft office tools
- Good analytical and reasoning skills
- Strong background in testing of Electronic Systems
- Excellent oral and written communication skills